A Parallel Median Filter with Pipelined Scheduling for Real-Time 1D and 2D Signal Processing
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概要
- 論文の詳細を見る
In this paper, we propose a fast algorithm to realize parallel median filter for processing 1-D and 2-D signal. In the proposed pipelined architecture, m-passes are employed for filtering signal while word resolution is m bits. One pass employs one processing element (PE), and the number of PEs is independent of the number of samples. Therefore, we only need m P Es for real-time operation. With 8-bits resolution, the system gate-count is less than 5k. Moreover, this median architecture could be easily modified to consist of the programmable feature that may choose the better sampling numberr to filter signal. It should be also noted that our proposed processing flow has a progressive property, which is very suitable for bandwidth-limited channel application.
- 社団法人電子情報通信学会の論文
- 2000-07-25
著者
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Hsu Wei-chih
The Department Of Computer And Communication Engineering National Kaohsiung First University Of Scie
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Hsia S‐c
National Kaohsiung First Univ. Sci. Technol. Kaohsiung Twn
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HSIA Shih-Chang
the Department of Computer and Communication Engineering, National Kaohsiung First University of Sci
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- A Parallel Median Filter with Pipelined Scheduling for Real-Time 1D and 2D Signal Processing