Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model (Special Section of Papers Selected from ITC-CSCC '98)

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概要

• 論文の詳細を見る

• This paper treats a fault detection/location of multi-processor systems, and we present a checking scheme based on Modified Processor-Data (MPD) graph with considering an error generation/propagation model for Algorithm-Based Fault Tolerant (ABFT) systems. The error propagation model considered here allows a computation result with multiple (more than one) erroneous inputs to be either erroneous or error-free. Also a basic algorithm for constructing checks for single-fault locatable /two-fault detectable ABFT systems based on the checking scheme is described with design examples.

• 社団法人電子情報通信学会の論文
• 1999-06-25

著者

• Kaneko M

  Japan Advanced Inst. Sci. And Technol. Jpn

• Kaneko M

  Japan Advanced Inst. Sci. Technol. Ishikawa Jpn

• Kaneko Mineo

  Faculty Of Engineering Tokyo Institute Of Technology

• Park C‐s

  Faculty Of Information Science Japan Advanced Institute Of Science And Technology

• Park Choon-sik

  Faculty Of Information Science Japan Advanced Institute Of Science And Technology

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• LMS-Based Algorithms with Multi-Band Decomposition of the Estimation Error Applied to System Identification (Special Section on Digital Signal Processing)
• Multi-Band Decomposition of the Linear Prediction Error Applied to Adaptive AR Spectral Estimation
• Checking Scheme for ABFT Systems Based on Modified PD Graph under an Error Generation/Propagation Model (Special Section of Papers Selected from ITC-CSCC '98)
• Adaptive AR Spectral Estimation Based on Wavelet Decomposition of the Linear Prediction Error
• LIBRA: Automatic Performance-Driven Layout for Analog LSIs
• Fault Tolerant Non-regular Digital Signal Processing Based on Computation Tree Block Decomposition

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