A Pipeline Structure for the Sequential Boltzmann Machine (Special Section of Papers Selected from ITC-CSCC '98)
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概要
- 論文の詳細を見る
In this paper, by making good use of the parallel-transit-evaluation algorithm [11] and sparsity of the connection between neurons, a pipeline structure is successfully introduced to the sequential Boltzmann machine processor. The novel structure speeds up nine times faster than the previous one [11], with only the 12% rise in hardware resources under 10,000 neurons. The performance is confirmed by designing it using 1.2 μm CMOS process standard cells and analyzing the probability of state-change.
- 社団法人電子情報通信学会の論文
- 1999-06-25
著者
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Sasaki Mamoru
The Faculty Of Engineering Kumamoto University
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Zhu Hongbing
Information Processing Center Kumamoto University
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Sasaki Mamoru
Dept. Of Electrical And Computer Engineering Faculty Of Engineering Kumamoto University
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INOUE Takahiro
Dept. of Electrical and Computer Engineering, Faculty of Engineering, Kumamoto University
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Inoue Takahiro
Dept. Of Electrical And Computer Engineering Faculty Of Engineering Kumamoto University
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