Simplified Routing Procedure for a CAD-Verified FPGA (Special Section on VLSI Design and CAD Algorithms)

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概要

• 論文の詳細を見る

• The design of high performance-circuits using Field-Programmable Gate Arrays (FPGAs) requires a balance between the FPGA's architecture and CAD algorithms. Conventional FPGAs and CAD algorithms are developed independently, which makes it difficult to implement application circuits. To solve this problem, we developed a CAD-verified FPGA whose architecture was designed at the same time as the CAD algorithms. This paper shows how a CAD-verified FPGA architecture can simplify a routing algorithm. The algorithm is studied in terms of computational complexity and is simplified using the properties of our FPGA (switch module structure and the number of routing resources). The routing algorithm is almost one hundred times faster than that of the conventional router, and the quality of its circuits is also improved.

• 社団法人電子情報通信学会の論文
• 1999-11-25

著者

• TAKAHARA Atsushi

  NTT Network Innovation Laboratories, NTT Corporation

• Murooka T

  Ntt Corp. Yokosuka‐shi Jpn

• Murooka Takahiro

  Ntt Network Innovation Laboratories Ntt Corporation

• Miyazaki Toshiaki

  Ntt Network Innovation Laboratories

• Takahara Atsushi

  Ntt Network Innovation Laboratories

• MUROOKA Takahiro

  NTT Network Innovation Laboratories

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