Delay Calculation Method for SRAM-based FPGAs (Special Section on VLSI Design and CAD Algorithms)
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概要
- 論文の詳細を見る
We propose a propagation delay model for SRAM-based FPGAs. It is a simplified Elmore delay model with a linear fan-out function. Therefore, the computational complexity is small. In order to ensure calculation accuracy, the model parameters are extracted from real layout data. The average model error is 4% compared to actual delays. The model is applicable for delay estimation in a router and as a tool for static calculation of critical path delay.
- 社団法人電子情報通信学会の論文
- 1997-10-25
著者
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KATAYAMA Masaru
Network Service Systems Laboratories, NTT Corporation
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Miyazaki T
Ntt Corp. Yokosuka‐shi Jpn
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MIYAZAKI Toshiaki
NTT Optical Network Systems Laboratories
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FUKAMI Kennosuke
NTT Science and Core Technology Laboratory Group
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KATAYAMA Masaru
NTT System Electronics Laboratories
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TAKAHARA Atsushi
NTT System Electronics Laboratories
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MIYAZAKI Toshiaki
NTT System Electronics Laboratories
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Katayama Masaru
Network Service Systems Laboratories Ntt Corporation
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Fukami K
Ntt Science And Core Technology Laboratory Group
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