On Multiple-Valued Logical Functions Realized by Asynchronous Sequential Circuits (Special Section on Discrete Mathematics and Its Applications)
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概要
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This paper concerns multiple-valued logical function realized by asynchronous circuit that may have "feed-back loops" and its completeness problems. The first aim is to give mathematical definition of an asynchronous circuit over multiple-valued logical functions and of the realization of multiple-valued logical function by means of an asynchronous circuit. For asynchronous element, the definition of circuit construction and initialization are very sensitive. A slight modification may have a considerable influence on the completeness. We consider three types of completeness (LF-, GS-, NS-completeness) for a set of multiple-valued logical functions. The LF-completeness means completenss of logical functions realized "loop-free" cirucit. The GS-completeness means completeness under general initialization assumption. The NS-completeness measn completeness under initialization by input assumption. The second aim is to give a completeness criterion for each type of completeness. This aim is realized for LF-completeness in general case and GS-completeness in ternary case. A completeness criteria for GS-completeness and NS-completeness are given under strong conditions.
- 社団法人電子情報通信学会の論文
- 1996-04-25
著者
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SATO Hisashi
Department of Techno-Business Administration Graduate School of Engineering, Nagoya Institute of Tec
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Sato H
Advantest Corp. Meiwa‐mura Jpn
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Sato Hisashi
Department Of Information And Computer Sciences Faculty Of Engineering Saitama University
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