A Unified Analysis of Adaptively Biased Emitter- and Source-Coupled Pairs for Linear Bipolar and MOS Transconductance Elements

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概要

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• Circuit design techniques for linearizing adaptively biased differential pairs are described. An emitter-and source-coupled pair is adaptively biased by a squaring circuit to linearize its transconductance, one of whose inputs is divided by resistors. An input signal for a differential pair or a squaring circuit is set to an adequate amplitude by a resistive divider without sacrificing linearity. Therefore, a differential pair is biased by the output current of a squaring circuit and they are coupled directly. There are three design techniques for squaring circuits. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. The bipolar and MOS squaring circuits discussed in this paper were proposed by the author previously, and consist of transistor-pairs with different transistor size (i.e., the emitter areas or gate W/L values are different), transistor-pairs with the same bias offset, or a multitail cell (i.e., a triple-tail cell or quadritail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to produce the quadratic bias currents for compensating the nonlinearity of an emitter-and source-coupled pair. Therefore, four circuits using emitter-coupled pairs with adaptive-biasing current and four circuits using source-coupled pairs with adaptive-biasing current are proposed and analyzed in depth. Furthermore, a circuit configuration for low voltage operation is also introduced and verified with bipolar transistor-arrays on a breadboard.

• 社団法人電子情報通信学会の論文
• 1995-04-25

著者

• Kimura Katsuji

  Fundamental Technologies Development Department Mobile Communications Division Nec Corporation

• Kimura Katsuji

  Fundamental Technologies Development Dept. Mobile Communications Div. Nec Corporation

関連論文

• A Unified Analysis of Adaptively Biased Emitter- and Source-Coupled Pairs for Linear Bipolar and MOS Transconductance Elements
• A Bipolar Very Low-Voltage Multiplier Core Using a Quadritail Cell
• A Linear CMOS Transconductance Element of an Adaptively Biased Source-Coupled Differential Pair Using a Quadritail Cell (Special Section on Analog Technologies in Submicron Era)
• The Super-Multi-Tanh Technique for Bipolar Linear Transconductance Amplifiers (Special Section on Analog Technologies in Submicron Era)

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