A Bipolar Very Low-Voltage Multiplier Core Using a Quadritail Cell

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概要

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• A bipolar low-voltage multiplier core is presented. The proposed low-voltage multiplier core is built from a bipolar quadritail cell. Voltages applied to the individual bases of the transistors in the bipolar quadritail cell are aV_x + bV_y, (a-1) V_x + (b-1) V_y, aV_x + (b-1) V_y, and (a-1) V_x + bV_y, where V_x and V_y are the input signals, and a and b are constants, for example, V_x + V_y, 0, V_x, and V_y. Simple input systems using resistive dividers are also described. The dc transfer characteristics were verified on a breadboard using transistor-arrays and discrete components. The dc transfer characteristic of the proposed multiplier core is very close to that of the Gilbert multiplier cell, but the proposed multiplier core is operable on low supply voltage. Therefore, a bipolar multiplier core using a quadritail cell is a low-voltage version of the Gilbert multiplier cell. The proposed bipolar multiplier is practically useful because it can be easily implemented in integrated circuits by utilizing a multiplier core and a resistor-only input system, and it also operates at very lowvoltage. Therefore, the proposed bipolar multipliers are very suitable for low-power operation.

• 一般社団法人電子情報通信学会の論文
• 1995-05-25

著者

• Kimura Katsuji

  Fundamental Technologies Development Department Mobile Communications Division Nec Corporation

関連論文

• A Unified Analysis of Adaptively Biased Emitter- and Source-Coupled Pairs for Linear Bipolar and MOS Transconductance Elements
• A Bipolar Very Low-Voltage Multiplier Core Using a Quadritail Cell
• A Linear CMOS Transconductance Element of an Adaptively Biased Source-Coupled Differential Pair Using a Quadritail Cell (Special Section on Analog Technologies in Submicron Era)
• The Super-Multi-Tanh Technique for Bipolar Linear Transconductance Amplifiers (Special Section on Analog Technologies in Submicron Era)

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