Synthesizing Eficient VLSI Array Processors from Iterative Algorithms by Excluding Pseudo-Dependences

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概要

• 論文の詳細を見る

• This paper is concerned with synthesizing VLSI array processors from iterative algorithms. Our primary objective is to obtain the highest processor efficiency but not the shortest completion time. Unlike most of the previous work that assumes the index space of the given iterative algorithm to be boundless, the proposed method takes into account the effects of the boundaries of the index space. Due to this consideration, the pseudo-dependence relations are excluded, and most of the independent computations can therefore be uniformly grouped. With the method described in this paper, the index space is partitioned into equal-size blocks and the corresponding computations are systematically and uniformly mapped into processing elements. The synthesized VLSI array processors possess the attractive feature of very high processor efficiency, which, in general, is superior to what is derived from the conventional linear transformation methods.

• 社団法人電子情報通信学会の論文
• 1995-10-25

著者

• Chen Y‐s

  Chung‐hua Univ. Hsin‐chu Twn

• Wang Sheng-de

  Department Of Electrical Engineering Ee Building National Taiwan University

• Su Kuo-chun

  Department Of Electrical Engineering Ee Building National Taiwan University

• Chen Yeong-Sheng

  Department of Electrical Engineering, EE Building, National Taiwan University

関連論文

• Synthesizing Eficient VLSI Array Processors from Iterative Algorithms by Excluding Pseudo-Dependences
• A High Performance Fault-Tolerant Switching Network for ATM

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