Discussions for Computer Hardware Constructors and Controlling Instructions

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Abstract To make computers speed-up without changing of clock periods, we discussed non Neumann's architecture and the instructions. We refer to buffer storages, branch-functions, and data-pipelines. For the buffer storage, we classify load/store instructions into two categories. One is executed surely, and it belongs to von-Neumann's instructions. Another is done possibly. It generates a buffer transfer action and belongs to non Neumann's. They don't give significant results logically but make fetch/store resources in high-speed. For branch-functions, we propose new branch instructions that give plural instruction-streams. We add an attribution to executions of instructions; that is fuzzy executions. As actuality of such fuzzy executions, we make a modeling for a brain-processing. For data-pipelines, we consider instructions to control pipeline stages of arithmetic resources by using clock phases. We evaluate the effects for polynomials, and show implicit parallel characters in the collective calculations.
宮崎大学の論文