次世代超高速スイッチング素子ゲート駆動回路の開発

概要

論文の詳細を見る
This paper describes a gate drive circuit which is capable to drive an ultra high-speed switching device and to suppress a high-frequency noise caused by its high-dV/dt rate of 104-V/μs order. SiC (Silicone Carbide) based power semiconductor devices are very promising as next generation ultra high-speed switching devices. However, one of their application problems is how to drive them with less high-frequency noise without sacrificing their ultra high-speed operation capability. The paper proposes a new gate drive circuit specialized for such devices, which charges and discharges the input capacitance of the device by using an impulse voltage generated by inductors. This ultra high-speed switching operation causes the high-frequency common-mode noise current in the gate drive circuit, which penetrates an isolated power-supply transformer due to the parasitic capacitance between the primary and the secondary windings. In order to overcome this secondary problem, a toroidal multi-core transformer is also proposed in the paper to reduce the parasitic capacitance drastically. By applying the former technique, the turn-on time and the turn-off time of the power device were shortened by 50% and by 20%, compared with a conventional push-pull gate drive circuit, respectively. In addition, the latter technique allows suppressing the peak common-mode noise current down to 25%, compared with a case of using a conventional standard utility power-supply transformer.
2009-01-01

次世代超高速スイッチング素子ゲート駆動回路の開発

スポンサーリンク

概要

著者

関連論文

スポンサーリンク