Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits

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概要

• 論文の詳細を見る
• 2004-09-15

著者

• Chawda Pradeep

  Department Of Electrical Engineering Iit

• ANAND Bulusu

  Department of Electrical Engineering, IIT

• RAMGOPAL RAO

  Department of Electrical Engineering, IIT

• Ramgopal Rao

  Department Of Electrical Engineering Iit

• Anand Bulusu

  Department Of Electrical Engineering Iit

関連論文

• Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits
• Understanding the Impact of Process Variations on Analog Circuit Performance with Halo Channel Doped Deep Sub-Micron CMOS Technologies
• Optimum Body Bias Constraints for Leakage Reduction in High-$k$ Complementary Metal–Oxide–Semiconductor Circuits

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