Understanding the Impact of Process Variations on Analog Circuit Performance with Halo Channel Doped Deep Sub-Micron CMOS Technologies

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概要

• 論文の詳細を見る
• 2004-09-15

著者

• Narasimhulu K.

  Department Of Electrical Engineering Indian Institute Of Technology Bombay

• Ramgopal Rao

  Department Of Electrical Engineering Iit

• Ramgopal Rao

  Department Of Electrical Engineering Indian Institute Of Technology Bombay

関連論文

• Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits
• Understanding the Impact of Process Variations on Analog Circuit Performance with Halo Channel Doped Deep Sub-Micron CMOS Technologies

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