Impact of Co-salicide capping layer on GIDL in High Voltage devices for Embedded Flash memory
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概要
- 論文の詳細を見る
- 2004-09-15
著者
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Shukla Dhruva
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Zhao Jing
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Huang Qiang
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Kim Nam
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Han Sang
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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You Young
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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MUKHO Madhusudan
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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NG Yeow
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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YEW Wong
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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JAUW How
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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YOON Hyun
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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GOH Inn
Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.
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Ng Yeow
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Goh Inn
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Yew Wong
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Jauw How
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Mukho Madhusudan
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
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Yoon Hyun
Process Integration Department Systems On Silicon Manufacturing Co. Pte. Ltd.
関連論文
- Impact of Co-salicide capping layer on GIDL in High Voltage devices for Embedded Flash memory
- A new low temperature APM cleaning process to improve ONO integrity in 0.18μm stacked-gate EEPROM memory