On-chip Clock Distribution Using Transmission Line
スポンサーリンク
概要
- 論文の詳細を見る
- 1999-09-20
著者
-
Yamashina Masakazu
Silicon-systems Research Laboratories Nec Corporation
-
Mizuno Masayuki
Silicon-systems Research Laboratories Nec Corporation
関連論文
- A 0.18-μm CMOS Hot-Standby PLL Using a Noise-Immune Adaptive-Gain VCO (Special Issue on Low-Power and High-Speed LSI Technologies)
- On-chip Clock Distribution Using Transmission Line