A Reliable Interconnection Technology Using Organic Low-K Dielectrics for 0.18μm CMOS Circuit

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概要

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1999-09-20

著者

Miyamoto Takaaki
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
TOKUNAGA Kazuhiko
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
IKEDA Koichi
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
HASEGAWA Toshiaki
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
FUKASAWA Masanaga
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
KITO Hideyuki
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
KADOMURA Shingo
Process Development Dept. 2, LSI Business &Technology Development Group, C.N.C., Sony Corporation
Kito Hideyuki
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Kadomura Shingo
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Hasegawa Toshiaki
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Tokunaga Kazuhiko
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Fukasawa Masanaga
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Ikeda Koichi
Process Development Dept. 2 Lsi Business &technology Development Group C.n.c. Sony Corporation
Fukasawa Masanaga
Process Design Department, Semiconductor Technology Development Division, Core Device Development Group, R&D Platform, Sony Corporation, Atsugi, Kanagawa 243-0014, Japan

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