25V - 13mΩ・mm^2 Low On-Resistance Novel Structure Trench Gate LDMOS
スポンサーリンク
概要
- 論文の詳細を見る
- 1999-09-20
著者
-
Sano Takeshi
Microelectronics Center Toshiba Corporation Semiconductor Company
-
KAWAGUCHI Yusuke
Advanced Discrete Semiconductor Technology Laboratory, Toshiba Corporation
-
NAKAGAWA Akio
Advanced Discrete Semiconductor Technology Laboratory, Toshiba Corporation
-
Kawaguchi Yusuke
Advanced Discrete Semiconductor Technology Laboratory Toshiba Corporation
-
Nakagawa Akio
Advanced Discrete Semiconductor Technology Laboratory Toshiba Corporation
-
Nakagawa Akio
Advanced Discrete Semiconductor Technology Laboratories Toshiba Corporation
関連論文
- Evaluation of 0.3μm Poly-Silicon CMOS Circuits for Intelligent Power IC Application
- 25V - 13mΩ・mm^2 Low On-Resistance Novel Structure Trench Gate LDMOS
- Electrical Characteristics of Polysilicon CMOS Analog and Driver Circuits for Intelligent IGBTs
- Evaluation of 0.3μm Poly-Silicon CMOS Circuits for Intelligent Power IC Application