A Programmable Delay Element for Low-Power PLL Applications

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概要

• 論文の詳細を見る
• 1999-05-05

著者

• Liao Huan-sen

  Dept. Of Electrical Engineering Tamkang University

• CHENG Kuo-Hsing

  Dept. EE, National Central University

• Cheng Kuo-hsing

  Dept. Of Electrical Engineering Tamkang University

関連論文

• A Programmable Delay Element for Low-Power PLL Applications
• 64-Bit High-Performance Power-Aware Conditional Carry Adder Design(Integrated Electronics)

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