A New Basic Element for Neural Logic Circuits

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概要

• 論文の詳細を見る
• 1997-09-16

著者

• Omura Yasuhisa

  Dept. Of Electronics Faculty Of Engineering Kansai University

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• Sub-100-nm Partial-Ground-Plane(PGP) Silicon-on-Insulator (SOI) MOSFET Structure for Radio-Frequency and Digital Applications
• A New Basic Element for Neural Logic Circuits

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