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the Department of Electronics, Information and Communication Engineering, Waseda University | 論文
- A Performance-Oriented Simultaneous Placement and Global Routing Algorithm for Transport-Processing FPGAs (Special Section on VLSI Design and CAD Algorithms)
- Simultaneous Placement and Global Routing for Transport-Processing FPGA Layout (Special Section on VLSI Design and CAD Algorithms)
- A High-Level Synthesis System for Digital Signal Processing Based on Data-Flow Graph Enumeration (Special Section on VLSI Design and CAD Algorithms)
- A Fast Elliptic Curve Cryptosystem LSI Embedding Word-Based Montgomery Multiplier (System LSIs and Microprocessors, VLSI Design Technology in the Sub-100nm Era)
- A New Hardware/Software Partitioning Algorithm for DSP Processor Cores with Two Types of Register Files(Special Section on VLSI Design and CAD Algorithms)
- Area and Delay Estimation in Hardware/Software Cosynthesis for Digital Signal Processor Cores(Special Section on VLSI Design and CAD Algorithms)
- CAM Processor Synthesis Based on Behavioral Descriptions (Special Section on VLSI Design and CAD Algorithms)
- A Hardware / Software Cosynthesis System for Digital Signal Processor Cores with Two Types of Register Files (Special Section of Selected Papers from the 12th Workshop on Circuit and Systems in Karuizawa)
- Optimal Constraint Graph Generation Algorithm for Layout Compaction Using Enhanced Plane-Sweep Method (Special Section on Discrete Mathematics and Its Applications)
- Development of Biological Micro Reactor Array System(Special Issue on Integrated Systems with New Concepts)
- An FPGA Layout Reconfiguration Algorithm Based on Global Routes for Engineering Changes in System Design Specifications(Special Section on Discrete Mathematics and Its Applications)