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Sony Corp. | 論文
- Multi-Level Bounded Model Checking with Symbolic Counterexamples
- Formal Verification based on recurrence equations and equivalence checking
- A Unified Framework for Equivalence Verification of Datapath Oriented Applications
- An Equivalence Checking Method for C Descriptions Based on Symbolic Simulation with Textual Differences(Simulation and Verification, VLSI Design and CAD Algorithms)
- Self-organization of distributedly represented multiple behavior schemata in a mirror system : reviews of robot experiments using RNNPB
- 49.3: Preparation and Characterization of Flare-Earth Activators Doped Nanocrystal Phosphors(3.主な蛍光体関連発表内容)(Report on 1999 SID International Symposium)
- CRT Invited Phosphor Screen Technology for Ideal CRTs(2.1.1 電子線励起)(2.1 粉体蛍光体)(Report on Asia Display/IDW'01)
- Sound Radiation from a Housing Having a Latticed Rib
- An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon Debugging
- 3.3 : Ultra-Large-Screen Color Display (Reports of 1985 SID International Symposium (2) Keynote and Invited Address, CRT)
- Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture
- Performance Estimation with Automatic False-Path Detection for System-Level Designs
- Exact Minimum Factoring of Incompletely Specified Logic Functions via Quantified Boolean Satisfiability
- Custom Instruction Generation for Configurable Processors with Limited Numbers of Operands
- Trends in Formal Verification Techniques for C-based Hardware Designs