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Process Engineering Dept. 5, MagnaChip Semiconductor., Ltd. | 論文
- Etch Defect Reduction Using SF_6/O_2 Plasma Cleaning and Optimizing Etching Recipe in Photo Resist Masked Gate Poly Silicon Etch Process
- Shallow Trench Isolation Top Corner Rounding Using Si Soft Etching Following Diluted Hydrofluorine Solution