Yeh Wen-Kuan | Electrical Engineering Department, National University of Kaohsiung, No. 700, Kaohsiung University Rd., Nan-Tzu Dist., Kaohsiung 811, Taiwan

スポンサーリンク

概要

関連著者

Fang Yean-kuen
Vlsi Technology Lab. Institute Of Microelectronics Ee Department National Cheng Kung University No.
Yeh Wen-kuan
Electrical Engineering Department National University Of Kaohsiung
Huang Yao-Tsung
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Lin Chien-Ting
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan
Lai Chieh-Ming
VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan
Hsu Che-Hua
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Cheng Li-Wei
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Ma Guang
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Ma Guang
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Cheng Li-Wei
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Hsu Che-Hua
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, HsinChu City 300, Taiwan
Hsu Che-Hua
Central R&D Division, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, Hsin-Chu City, Taiwan 30007
Yeh Wen-Kuan
Electrical Engineering Department, National University of Kaohsiung, No. 700, Kaohsiung University Rd., Nan-Tzu Dist., Kaohsiung 811, Taiwan

もっと見る

著作論文

Extra Bonus on Transistor Optimization with Stress Enhanced Notched-Gate Technology for Sub-90 nm Complementary Metal Oxide Semiconductor Field Effect Transistor

スポンサーリンク