Ueda Yoshitaka | Sanyo Electric Co., Ltd., 180 Ohmori, Anpachi, Gifu 503-0195, Japan

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概要

関連著者

TAKAHASHI Eiichi
National Institute of Advanced Industrial Science and Technology
Higuchi Tetsuya
National Institute of Advanced Industrial Science and Technology (AIST), Central 2 (MBOX 35225), 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
Susa Tatsuya
Graduate School of Science, Toho University, 2-2-1 Miyama, Funabashi, Chiba 274-8510, Japan
Murakawa Masahiro
National Institute of Advanced Industrial Science and Technology (AIST), Central 2 (MBOX 35225), 1-1-1 Umezono, Tsukuba, Ibaraki 305-8568, Japan
Furuya Tatsumi
Graduate School of Science, Toho University, 2-2-1 Miyama, Funabashi, Chiba 274-8510, Japan
Furuichi Shinji
Sanyo Electric Co., Ltd., 180 Ohmori, Anpachi, Gifu 503-0195, Japan
Ueda Yoshitaka
Sanyo Electric Co., Ltd., 180 Ohmori, Anpachi, Gifu 503-0195, Japan
Wada Atsushi
Sanyo Electric Co., Ltd., 180 Ohmori, Anpachi, Gifu 503-0195, Japan
Higuchi Tetsuya
National Institute of Advanced Industrial Science and Technology (AIST)
Murakawa Masahiro
National Institute of Advanced Industrial Science and Technology (AIST)

著作論文

An Additional 12% Power Reduction in Practical Digital Chips with a Low-Power Design Using Post-Fabrication Clock-Timing Adjustment

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