Komatsu Yoshihide | Semiconductor Technology Academic Research Center (starc):presently With Matsushita Electric Industr
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- KOMATSU Yoshihideの詳細を見る
- 同名の論文著者
- Semiconductor Technology Academic Research Center (starc):presently With Matsushita Electric Industrの論文著者
Semiconductor Technology Academic Research Center (starc):presently With Matsushita Electric Industr | 論文
- Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90nm Technology and Beyond (Low Power Techniques, VLSI Design Technology in the Sub-100nm Era)
- Soft Error Hardened Latch Scheme with Forward Body Bias in a 90-nm Technology and Beyond (Soft Error, VLSI Design Technology in the Sub-100nm Era)