Oguro Yusuke | Graduate School Of Information Science And Engineering Dept. Of Computer Science Tokyo Institute Of
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Graduate School Of Information Science And Engineering Dept. Of Computer Science Tokyo Institute Of | 論文
- Partial Order Reduction for Timed Circuit Verification Based on Level Oriented Model(Verification and Dependability Analysis)(Dependable Computing)
- Partial Order Reduction for Timed Circuit Verification Based on Level Oriented Model
- Formal Verification of Data-Path Circuits Based on Symbolic Simulation