Han Yinhe | Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy
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Key Laboratory Of Computer System And Architecture Institute Of Computing Technology Chinese Academy | 論文
- A Novel Post-Silicon Debug Mechanism Based on Suspect Window
- Extended Selective Encoding of Scan Slices for Reducing Test Data and Test Power
- A New Multiple-Round Dimension-Order Routing for Networks-on-Chip
- A Domain Partition Model Approach to the Online Fault Recovery of FPGA-Based Reconfigurable Systems
- Compression/Scan Co-design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time(Dependable Computing)