Wu Jiin-chuan | Integrated Circuit And Systems Laboratory Department Of Electronics Engineering National Chiao-tung
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Integrated Circuit And Systems Laboratory Department Of Electronics Engineering National Chiao-tung | 論文
- A 30V High Voltage NMOS Structure Design in Standard 5V CMOS Processes(Semiconductor Materials and Devices)
- A Compact Low-Power Rail-to-Rail Class-B Buffer for LCD Column Driver
- Implementing Compensation Capacitor in Logic CMOS Processes
- A 60 μA Quiscent Current, 250 mA CMOS Low Dropout Regulator
- A 30 V High Voltage NMOS Structure Design in Standard 5 V CMOS Processes