JIN Y. | Chartered Semiconductor Manufacturing Ltd

スポンサーリンク

概要

関連著者

Li M.
Silicon Nano Device Lab (sndl) Ece Department National University Of Singapore
Li M.
Silicon Nano Device Lab Department Of Electrical & Computer Engineering National University Of S
HOU Y.
Silicon Nano Device Lab (SNDL), ECE Department, National University of Singapore
LAI W.
Silicon Nano Device Lab, Department of Electrical & Computer Engineering National University of Sing
JIN Y.
Chartered Semiconductor Manufacturing Ltd
Lai W.
Silicon Nano Device Lab Department Of Electrical & Computer Engineering National University Of S

著作論文

A Physical Model for Hole Direct Tunneling Currents Through Ultrathin Gate Dielectrics in Advanced CMOS Devices

スポンサーリンク