MATSUNAGA Taeko | Fukuoka Laboratory for Emerging & Enabling Technology of SoC (FLEETS)

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概要

関連著者

Matsunaga Yusuke
Department Of Computer Science And Communication Engineering
Matsunaga Yusuke
Department Of Computer Science And Communication Engineering Faculty Of Information Science And Elec
MATSUNAGA Taeko
Fukuoka Laboratory for Emerging & Enabling Technology of SoC (FLEETS)
Matsunaga Taeko
Fukuoka Laboratory For Emerging & Enabling Technology Of Soc (fleets):(present Office)graduate S
Matsunaga Yusuke
Department Of Advanced Information Technology Faculty Of Information Science And Electrical Engineering Kyushu University

著作論文

Timing-Constrained Area Minimization Algorithm for Parallel Prefix Adders(Logic Synthesis and Verification,VLSI Design and CAD Algorithms)

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