Wu Chien-ming | Chip Implementation Center National Applied Research Laboratories
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概要
関連著者
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Wu Chien-ming
Chip Implementation Center National Applied Research Laboratories
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SHIEH Ming-Der
Department of Electrical Engineering, National Cheng-Kung University
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Shieh Ming-der
Department Of Electrical Engineering National Cheng Kung University
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Shieh Ming-der
The Department Of Electrical Engineering National Cheng Kung University
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Chen Jun-hong
The Department Of Electrical Engineering National Cheng Kung University
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WANG Tai-Ping
Department of Electrical Engineering, National Cheng Kung University
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Wang Tai-ping
Department Of Electrical Engineering National Cheng Kung University
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Shieh Ming‐der
National Cheng Kung Univ. Tainan Twn
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WU Chien-Ming
Chip Implementation Center, National Applied Research Laboratories
著作論文
- Reducing Interconnect Complexity for Efficient Path Metric Memory Management in Viterbi Decoders
- High-Speed Design of Montgomery Inverse Algorithm over GF(2^m) (Information Security)