Choi Ho-yong | School Of Electrical & Computer Eng. Chungbuk National University
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概要
School Of Electrical & Computer Eng. Chungbuk National University | 論文
- Test Generation for SI Asynchronous Circuits with Undetectable Faults from Signal Transition Graph Specification(Special Section on Papers Selected from ITC-CSCC 2000)
- Synthesis for Testability of Synchronous Sequential Circuits with Strong-Connectivity Using Undefined States on State Transition Graph(Test)(VLSI Design and CAD Algorithms)
- High-Level Test Generation for Asynchronous Circuits from Signal Transition Graph(Special Section on VLSI Design and CAD Algorithms)