Room-temperature GaAs/InP wafer bonding with extremely low resistance

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概要

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• Low-temperature direct wafer bonding is a promising technique for fabricating multijunction solar cells with more than four junctions in order to obtain high conversion efficiencies. However, it has been difficult to reduce the bond interface resistance between a GaAs-based subcell wafer and an InP-based subcell wafer. We found that a novel bonding structure comprising heavily Zn-doped (1 × 10¹⁹cm⁻³) p⁺-GaAs and S-doped (3 × 10¹⁸cm⁻³) n-InP had an interface resistance of 2.5 × 10⁻⁵Ω·cm², which is the lowest value ever reported. This result suggests that the newly developed room-temperature wafer bonding technique has high potential to realize high-efficiency multijunction solar cells.

• 2014-10-07

著者

• Uchida Shiro

  Advanced Materials Laboratories, Sony Corporation, Atsugi, Kanagawa 243-0014, Japan.

関連論文

• Room-temperature GaAs/InP wafer bonding with extremely low resistance

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