Hot-Electron-Induced Device Degradation during Gate-Induced Drain Leakage Stress
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概要
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We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.
- 2012-11-25
著者
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Shin Joong-Shik
Samsung Electronics Co., Ltd., Yongin, Gyeonggi 446-711, Korea
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Han Chang-Hoon
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea
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Kim Kwang-Soo
Samsung Electronics Co., Ltd., Yongin, Gyeonggi 446-711, Korea
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Lee Jun-Ki
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea
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Kim Dong-Soo
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea
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Kim Hyong-Joon
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea
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Lee Hea-Beoum
Samsung Electronics Co., Ltd., Yongin, Gyeonggi 446-711, Korea
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Choi Byoung-Deog
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea