Optimization of the Fabrication Process for ZnO Thin-Film Transistors with HfO2 Gate Dielectrics

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概要

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• In this work, we address the analysis of ZnO thin films and electrical characteristics of ZnO thin film transistors (TFTs) with HfO2 high-$k$ gate dielectrics after low-temperature postannealing. The SIMS analysis shows that the diffusion of Zn atoms into the HfO2 gate dielectrics will occur after 300 °C annealing and the related electrical characteristics indicate that 200 °C annealing will be the suitable annealing condition for ZnO/HfO2/ITO-based TFTs. The ZnO TFTs after 200 °C annealing exhibited transistor behavior over the range of 0–7 V; the field effect mobility, subthreshold slope, and on/off ratio were measured to be 1.3 cm2 V-1 s-1, 0.5 V/decade, and ${\sim}10^{6}$, respectively.

• 2009-03-25

著者

• Chen Henry

  Department Of Electrical Engineering National Chi Nan University

• Yeh Barry

  Department of Electrical Engineering, National Chi Nan University, Puli Township, Nantou 54561, Taiwan

• Chen Henry

  Department of Electrical Engineering, National Chi Nan University, Puli Township, Nantou 54561, Taiwan

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