Investigation of Mobility Enhancement Effect in Process-Induced Strained Ultrathin Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors

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概要

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• Mobility enhancement effects in process-induced strained silicon-on-insulator (SOI) n-channel metal–oxide–semiconductor field-effect transistors (MOSFETs) are investigated using a combination of devices with different gate lengths. This method is useful for devices with short channels since it is free from the influence of pocket doping or parasitic resistance on the channel current. This approach is also useful to confirm the influence of variations in device parameters such as gate oxide thickness or SOI thickness. Using this method, large electron mobility enhancements in ultrathin (${\sim}12$ nm) SOI devices with a stressed contact etch stop layer (CESL) are confirmed for a wide range of gate voltages. Furthermore, it is demonstrated that the CESL also increases the back-channel mobility.

• 2008-04-25

著者

• Ohata Akiko

  IMEP, Minatec—INPG, 3 Parvis Louis Néel, BP 257, 38016 Grenoble Cedex 1, France

• Cristoloveanu Sorin

  IMEP, Minatec—INPG, 3 Parvis Louis Néel, BP 257, 38016 Grenoble Cedex 1, France

• Fenouillet-Beranger Claire

  CEA/LETI Minatec, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France

• Gallon Claire

  STMicroelectronics, Central R&D, 850 rue Jean Monnet, 38921 Crolles, France

関連論文

• Investigation of Mobility Enhancement Effect in Process-Induced Strained Ultrathin Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors

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