Advocating Noise as an Agent for Ultra-Low Energy Computing: Probabilistic Complementary Metal–Oxide–Semiconductor Devices and Their Characteristics
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概要
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Noise immunity and low-energy computing have become limiting factors in the semiconductor roadmap as transistor feature sizes shrink. The subject of our study is the probabilistic switch, implemented in the complementary metal–oxide–semiconductor (CMOS) domain, referred to as a probabilistic CMOS (PCMOS) switch, whose behavior is rendered probabilistic by noise. In conducting this study, we are motivated by the possibility of using such probabilistic switches to realize ultra-low energy computing. Based on PCMOS switches realized using 0.5 and 0.25 μm processes, we present detailed analytical models, subsequently verified through HSpice simulations. We consider the thermal noise and power supply noise as our sources for probabilistic behavior. Through one interesting aspect of the study, we characterize the effects of the noise sampling frequency and the output sampling frequency on probabilistic behavior. Finally, we briefly outline the opportunity that such probabilistic switches offer to ultra low-energy computing through the concept of a probabilistic system-on-a-chip (PSoC) architecture (that is based on PCMOS switches); such architectures can achieve significant energy savings and performance improvements at the application level.
- 2006-04-30
著者
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Akgul Bilge
Laboratory for Probabilistic Computing from Nanoscale Technologies, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, U.S.A.
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Korkmaz Pinar
Laboratory for Probabilistic Computing from Nanoscale Technologies, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, U.S.A.
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Palem Krishna
Laboratory for Probabilistic Computing from Nanoscale Technologies, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, U.S.A.
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Chakrapani Lakshmi
Laboratory for Probabilistic Computing from Nanoscale Technologies, School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, U.S.A.