Diminished Short Channel Effects in Nanoscale Double-Gate Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect-Transistors due to Induced Back-Gate Step Potential

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概要

• 論文の詳細を見る

• In this letter we discuss how the short channel behavior in sub 100 nm channel range can be improved by inducing a step surface potential profile at the back gate of an asymmetrical double gate (DG) silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect-transistor (MOSFET) in which the front gate consists of two materials with different work functions.

• INSTITUTE OF PURE AND APPLIED PHYSICSの論文
• 2005-09-15

著者

• Kumar M.

  Department Of Agricultural And Food Engineering Indian Institute Of Technology Kharagpur

• Reddy G.

  Department of Electrical Engineering, Indian Institute of Technology, Hauz Khas, New Delhi 110016, India

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• Diminished Short Channel Effects in Nanoscale Double-Gate Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect-Transistors due to Induced Back-Gate Step Potential

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