Radiation-Hardened SRAMs Fabricated by Advanced Commercial SOI-Technology
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概要
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We fabricate 128-Kbit SRAMS using rad-hard circuit design based on a mixed mode 3D-simulation in a commercial SOI foundry with 0.2 μm design rules. Appropriate design increases the critical LET of single-event-upset to 45 MeV/(mg/cm2). The upset rate for the SRAM installed in equipment in a GEO orbit (M=7) is estimated to be 3.1x10-7 upsets/device-day, which is quite an acceptable SEU hardness.
- 特定非営利活動法人 日本ロケット協会の論文
特定非営利活動法人 日本ロケット協会 | 論文
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