CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap
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概要
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This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.
著者
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KUO Po-Yo
National Yunlin University of Science & Technology
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LAI Hsin-Chi
NCUE
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YI Shu-Chung
NCUE
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LIN Zhi-Ming
NCUE