Reconfigurable pseudo-NMOS-like logic with hybrid MOS and single-electron transistors

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概要

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• A novel reconfigurable hybrid single electron transistor/MOSFET (SETMOS) circuit architecture, namely, reconfigurable pseudo-NMOS-like logic is proposed. Based on the hybrid SETMOS inverter/buffer circuit cell, reconfigurable pseudo-NMOS-like logics that can work normally at room temperature are constructed. This kind of reconfigurable logic can implement up to 2<I><SUP>n</SUP></I> sorts of functions at n inputs with different configurations. It only consumes 1 PMOS transistor, 1 NMOS transistor and n SETs, which reduces logic-gate density and power consumption significantly.

• The Institute of Electronics, Information and Communication Engineersの論文

著者

• Ni Shice

  Institute of Microelectronics, School of Computer, National University of Defense Technology

• Chen Xiaobao

  Institute of Microelectronics, School of Computer, National University of Defense Technology

• Xing Zuocheng

  Institute of Microelectronics, School of Computer, National University of Defense Technology

• Sui Bingcai

  Institute of Microelectronics, School of Computer, National University of Defense Technology

関連論文

• Reconfigurable pseudo-NMOS-like logic with hybrid MOS and single-electron transistors

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