FPGA Implementation of Human Detection by HOG Features with AdaBoost

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概要

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• We implement external memory-free deep pipelined FPGA implementation including HOG feature extraction and AdaBoost classification. To construct our design by compact FPGA, we introduce some simplifications of the algorithm and aggressive use of stream oriented architectures. We present comparison results between our simplified fixed-point scheme and an original floating-point scheme in terms of quality of results, and the results suggest the negative impact of the simplified scheme for hardware implementation is limited. We empirically show that, our system is able to detect human from 640×480 VGA images at up to 112FPS on a Xilinx Virtex-5 XC5VLX50 FPGA.

著者

• OGURI Kiyoshi

  Division of Electrical Engineering and Computer Science, Graduate School of Engineering, Nagasaki University

• DOHI Keisuke

  Department of Science and Technology, Graduate School of Engineering, Nagasaki University

• SHIBATA Yuichiro

  Division of Electrical Engineering and Computer Science, Graduate School of Engineering, Nagasaki University

• NEGI Kazuhiro

  Department of Science and Technology, Graduate School of Engineering, Nagasaki University

関連論文

• FPGA Implementation of Human Detection by HOG Features with AdaBoost

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