Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications

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概要

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• This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.

著者

• PHAM Cong-Kha

  Department of Electronic Engineering, The University of Electro-Communications

• HOANG Van-Phuc

  Department of Electronic Engineering, The University of Electro-Communications

関連論文

• An Improved Linear Difference Method with High ROM Compression Ratio in Direct Digital Frequency Synthesizer
• Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications

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