A 5MHz integrated digital DC-DC converter with a delay-line ADC and a Σ-Δ DPWM

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概要

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• An integrated digital buck DC-DC converter based on a 0.5µm standard CMOS process is presented in this paper. Its switching frequency is 5MHZ and no extra high frequency clock is needed. The delay-line ADC with a self-calibration loop utilized in the converter has low sensitivity to the process, voltage, temperature and loading (PVTL). The DPWM in the proposed DC-DC converter employs a first-order Σ-Δ modulator to achieve an equivalent resolution of 10-bit. The simulation results show that the proposed DC-DC converter can operate at the supply voltage range of 2.7 to 3.6V with a transient response time of 30µs. The peak efficiency reaches 94%.

著者

• Hu Xi

  Department of Electronic and Information Engineering, University of Xi'an

• Wang Shizhen

  Department of Electronic and Information Engineering, University of Xi'an

• Wang Hongyi

  Department of Electronic and Information Engineering, University of Xi'an

• Luo Dongzhe

  Department of Electronic and Information Engineering, University of Xi'an

• Zhao Gangdong

  Department of Electronic and Information Engineering, University of Xi'an

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• A 5MHz integrated digital DC-DC converter with a delay-line ADC and a Σ-Δ DPWM

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