A novel memristor-based rSRAM structure for multiple-bit upsets immunity
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概要
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A radiation hardened resistive SRAM structure (rSRAM) is proposed for the SRAM-based FPGAs in this paper. The rSRAM extends the conventional 6T SRAM structure by connecting memristors between the information nodes and drains of the transistors which compose cross-coupled invertors. With memristors connected to drains of OFF transistors configured to high resistance state while others configured to low resistance state forming stable voltage dividing path, the rSRAM structure is immune to both multiple-node upsets and multiple-bit upsets (MBUs). The simulation result demonstrates that rSRAM cell can tolerate simultaneous disruptions affecting all sensitive nodes with an LET (Liner Energy Transfer) of 100Mev-cm2/mg.
著者
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Lai Jinmei
ASIC & System State Key Lab, Dept. of Microelectronics, Fudan University
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Chen Liguang
ASIC & System State Key Lab, Dept. of Microelectronics, Fudan University
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Tong Jiarong
ASIC & System State Key Lab, Dept. of Microelectronics, Fudan University
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Zhang Chun
School of Electrical and Electronic Engineering, Nanyang Technological University
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Wang Liyun
ASIC & System State Key Lab, Dept. of Microelectronics, Fudan University