Optimal Design of Two-Dimensional Error Feedback Circuit with CSD Coefficients

概要

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In this paper, we consider a design problem of two-dimensional (2-D) error feedback (EF) circuit for reduction of a roundoff noise in 2-D infinite impulse response (IIR) digital filters. Though the EF is effective for reduction of the roundoff noise, the number of shifters in the EF circuit should be small for the fast arithmetic and low-cost realization. Canonical signed digit (CSD) number is efficient to represent the EF coefficients with finite word-length because it can be represented with less non-zero bits (shifters) than the one with the generally used binary number. In this paper, we propose an algorithm to optimize the EF coefficients with CSD coefficients. The proposed algorithm is based on the branch and bound method by estimating the lower bound of the optimal solution. The good point of the proposed method is that the optimality of the obtained solution can be guaranteed. Finally, we give a numerical example to demonstrate the effectiveness of the EF with CSD coefficients. Also, we show that the number of shifters can be efficiently reduced by using the CSD coefficients.