Performance enhancement techniques for CMOS power amplifier

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概要

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• In this paper, performance enhancement techniques for CMOS power amplifier (PA) are proposed. First, a small inductor is inserted between the common-gate transistors of a triple-cascode stage (PA unit) for improving the power-added efficiency (PAE). Moreover, cross-coupled pairs are utilized in the PA circuit to raise the gain. Furthermore, these additional cross-coupled transistors can boost the PAE and saturated output power (Psat) of the PA. Based on these methods, a K-band PA has been designed in 0.18-µm RF CMOS process. Simulated results confirm these methods applied to this PA can effectively improve the performance in terms of gain, Psat, and PAE.

著者

• Wang To-Po

  Department of Electronic Engineering and Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology

関連論文

• Performance enhancement techniques for CMOS power amplifier

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