High-sensitivity and wide-range CMOS temperature sensor circuit (特集 平成22年電気学会電子・情報・システム部門大会)
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概要
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In this paper, the architecture for high-sensitivity and wide-range CMOS temperature sensor circuits is presented. The proposed architecture consists of the PTAT circuit with the positive slope, the PTAT circuit with the negative slope and a subtractor. The concrete circuit based on the proposed architecture is designed, and evaluated through HSPICE with a set of device parameters of 0.18μm CMOS process. The simulations demonstrate a maximum temperature error of 2.3°C and the maximum current consumption of 28.7μA under the condition that the temperature range is from -20°C to 100°C, the sensitivity is 5.2mV/°C and VDD=1.5V.
- 社団法人 電気学会の論文
著者
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TANNO Koichi
Department of Pharmacology, Tohoku College of Pharmacy
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Sakamoto Ryota
Department of Engineering, Faculty of Engineering, Mie University
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Tamura Hiroki
Department Of Ophthalmology And Visual Science Graduate School Of Biomedical Sciences Hiroshima Univ
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Sakamoto Ryota
Department Of Computer Science Graduate School Of Information Science And Engineering Tokyo Institut
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Tanno Koichi
Department Of Pharmacology Tohoku Pharmaceutical University
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Tamura Hiroki
Department Of Electrical And Electronic Engineering Faculty Of Engineering University Of Miyazaki
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Sakamoto Ryota
Department Of Chemistry Graduate School Of Science The University Of Tokyo
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Tanno Koichi
Department Of Electrical And Electronic Engineering Faculty Of Engineering University Of Miyazaki
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