Reduction of Thermal Resistance for Chip Test Technology by Using Super Thermal Conductivity Material and Mirror Finished Silicon
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概要
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In recent years, an innovative 3D-integrated circuit has been developed. Furthermore, innovative chip test technology has also been developed whereby the test is conducted without the need to dice the wafer. Chip tests must be performed at various temperatures. The 3D-integrated circuit has a higher heat generation density than a conventional circuit, and so highly efficient cooling technology is required. We selected an indirect spray cooling technology. With indirect spray cooling, there is a material between the heat generating chips and the sprayed coolant. Therefore, to achieve more efficient spray cooling, the thermal resistance of the material and the contact thermal resistance between the material and the chip must be reduced. In this research, we focused on super thermal conductive composites (STC) to reduce the thermal resistance of the material. Measurement results showed that the thermal resistance of STC is very small and the key issue with the spray cooling chip test is the reduction of the contact thermal resistance between the material and the chip surface. We then evaluated the contact thermal resistance of silicon with a mirror-like finish experimentally. We applied a small amount of liquid between silicon wafers with a mirror-like finish and obtained a very small contact thermal resistance of about 0.2 × 10–4 m2K/W.
著者
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Ishizuka Masaru
Toyama Prefectural University
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Nakagawa Shinji
Toyama Prefectural University
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Hioki Yusuke
Toyama Prefectural University
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Hatakeyama Tomoyuki
Toyama Prefectural University
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Nakata Yoshiro
ASET
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Kuji Motohiro
ASET
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Tomimura Toshio
Kumamoto University
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- Reduction of Thermal Resistance for Chip Test Technology by Using Super Thermal Conductivity Material and Mirror Finished Silicon
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