Elixir: A new bandwidth-constrained mapping for Networks-on-chip
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概要
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Nowadays, with technology shrinking and the huge demand for supporting multiple applications has led designers to use multiple IP cores within a single chip. Therefore, the designers have proposed Networks-on-chip to overcome the problems of future complex systems. Mapping IPs directly affects NoC design parameters such as latency and power consumption. In this paper we present a power and performance aware mapping technique based on the combination of both the bandwidth-constrained and branch and bound concepts. Results have shown improvements of the latency and power consumption of our technique when compared to other popular NoC mappings.
著者
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Reshadi Midia
Islamic Azad University, Science and Research Branch
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Khademzadeh Ahmad
Iran Telecommunication Research Center
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Reza Akram
Islamic Azad University, Science and Research Branch